advanced power n-channel enhancement mode electronics corp. power mosfet simple drive requirement bv dss 60v small package outline r ds(on) 75m surface mount device i d 3.2a halogen free & rohs compliant product description absolute maximum ratings symbol units v ds v v gs v i d @t a =25 a i d @t a =70 a i dm a p d @t a =25 w t stg t j symbol value unit rthj-a maximum thermal resistance, junction-ambient 3 90 /w data and specifications subject to change without notice operating junction temperature range -55 to 150 201103021 thermal data parameter 1 storage temperature range continuous drain current 3 , v gs @ 10v 2.5 pulsed drain current 1 12 total power dissipation 1.38 gate-source voltage + 20 continuous drain current 3 , v gs @ 10v 3.2 parameter rating drain-source voltage 60 AP2310CGN-HF -55 to 150 halogen-free product g d s d g s sot-23 advanced power mosfets utilized advanced processing techniques to achieve the lowest possible on-resistance, extremely efficient and cost-effectiveness device. the sot-23 package is widely used for all commercial-industrial applications.
electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 60 - - v r ds(on) static drain-source on-resistance 2 v gs =10v, i d =3a - - 75 m ? v gs =4.5v, i d =2a - - 120 m ? v gs(th) gate threshold voltage v ds =v gs , i d =250ua 1 - 3 v g fs forward transconductance v ds =10v, i d =3a - 7 - s i dss drain-source leakage current v ds =48v, v gs =0v - - 10 ua i gss gate-source leakage v gs =+ 20v, v ds =0v - - + 100 na q g total gate charge 2 i d =3a - 6 9.6 nc q gs gate-source charge v ds =30v - 1.5 - nc q gd gate-drain ("miller") charge v gs =4.5v - 3.5 - nc t d(on) turn-on delay time 2 v ds =30v - 5 - ns t r rise time i d =1a - 6.5 - ns t d(off) turn-off delay time r g =3.3 -17- ns t f fall time v gs =10v - 3.5 - ns c iss input capacitance v gs =0v - 470 750 pf c oss output capacitance v ds =15v - 50 - pf c rss reverse transfer capacitance f=1.0mhz - 45 - pf source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =1.2a, v gs =0v - - 1.2 v t rr reverse recovery time 2 i s =3a, v gs =0v, - 20 - ns q rr reverse recovery charge di/dt=100a/s - 16 - nc notes: 1.pulse width limited by max. junction temperature. 2.pulse test 3.surface mounted on 1 in 2 copper pad of fr4 board ; 270 /w when mounted on min. copper pad. this product is sensitive to electrostatic discharge, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized. apec does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. apec reserves the right to make changes without further notice to any products herein to improve reliability, function or design. 2 AP2310CGN-HF
a p2310cgn-hf fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fi g 5. forward characteristic o f fig 6. gate threshold voltage v.s. reverse diode junction temperature 3 0 4 8 12 16 20 012345 v ds , drain-to-source voltage (v) i d , drain current (a) t a =25 o c 10v 7.0v 6.0v 5.0v v g = 4.0v 0 2 4 6 8 10 12 012345 v ds , drain-to-source voltage (v) i d , drain current (a) t a = 150 o c 10v 7.0v 6.0v 5.0v v g = 4.0v 50 60 70 80 90 246810 v gs , gate-to-source voltage (v) r ds(on) (m ) i d =2a t a =25 o c 0.4 0.8 1.2 1.6 2.0 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =3a v g =10v 0 2 4 6 8 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c 0.0 0.4 0.8 1.2 1.6 2.0 -50 0 50 100 150 t j , junction temperature ( o c) normalized v gs(th) (v) i d =250ua
AP2310CGN-HF fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform 4 t d(on) t r t d(off) t f v ds v gs 10% 90% q v g 4.5v q gs q gd q g charge 0 2 4 6 8 10 024681012 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =3a v ds =30v 0 200 400 600 800 1 5 9 1317212529 v ds , drain-to-source voltage (v) c (pf) f =1.0mh z c iss c oss c rss 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , pulse width (s) normalized thermal response (r thja ) 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse p dm duty factor = t/t peak t j = p dm x r thja + t a r thja = 270 /w t t 0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) i d (a) t a =25 o c single pulse 100us 1ms 10ms 100ms 1s dc 0.02 operation in this area limited by r ds(on)
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